PATENTS

I. Galton, M. Pedrali-Noy, “Fast Frequency Throttling and Re-Locking Technique for Phase-Locked Loops,” U.S. Patent No. 9,602,113, March 3, 2016.

I. Galton, “Foreground and Background Bandwidth Calibration Techniques for Phase-Locked Loops,” U.S. Patent No. 9,461,657, October 4, 2016.

G. Taylor, I. Galton, “Mostly-Digital Open-Loop Ring Oscillator Delta-Sigma ADC and Methods for Conversion,” U.S. Patent No. 9,397,691, July 19, 2016.

A. Swaminathan, I. Galton, “VCO With Linear Gain Over a Very Wide Tuning Range,” U.S. Patent No. 9,054,687, June 9, 2015.

G. Taylor, I. Galton, “Ring Oscillator Delta Sigma ADC Modulator With Replica Path Nonlinearity Calibration,” U.S. Patent No. 8,542,138, September 24, 2013.

A. Swaminathan, I. Galton, “Adaptive Phase Noise Cancellation for Fractional-N Phase Locked Loop,” U.S. Patent No. 7 ,999,622, August 16, 2011.

A. Swaminathan, I. Galton, “Nonlinearity Robust Successive Requantizer,” U.S. Patent No. 7,986,250, July 26, 2011.

P. Asbeck, I. Galton, “Radio Transmission Frequency Digital Signal Generation,” U.S. Patent No. 7,953,174, May 31, 2011.

M. Li, P. Asbeck, I. Galton, L. Larson, “Correlation Method for Monitoring Power Amplifier,” U. S. Patent No. 7,652,532, January 26, 2010.

A. Panigada, I. Galton, “Digital Background Correction of Nonlinear Error in ADCs,” U.S. Patent No. 7,652,532, October 13, 2009.

I. Galton, “Digital Background Cancellation of Digital to Analog Converter Mismatch Noise in Analog to Digital Converters,” U.S. Patent No. 7,006,028, February 28, 2006.

E. Fogleman, H. T. Jensen, I. Galton, “Analog-to-Digital Converters With Common-Mode Rejection Dynamic Element Matching, Including as Used in Delta-Sigma Modulators,” U.S. Patent No. 6,816,100, November 9, 2004.

I. Galton, “Digital Cancellation of D/A Converter Noise in Pipelined A/D Converters,” U.S. Patent No. 6,734,818, May, 2004.

I. Galton, J. A. Grilo, and K. J.-N. Wang, “Partial Mismatch-Shaping Digital-to-Analog Converter,” U.S. Patent No. 6,697,004, February, 2004.

S. Ye, I. Galton, “CMOS Phase Locked Loop With Voltage Controlled Oscillator Having Realignment to Reference and Method for the Same,” U.S. Patent No. 6,683,506, January, 2004.

I. Galton, “Method and Apparatus for Cyclic Return to Zero Techniques for Digital to Analog Convertors,” U.S. Patent No. 6,476,748, November, 2002.

I. Galton, “Spectral Shaping of Circuit Errors in Digital-to-Analog Converters,” U.S. Patent No. 5,684,482, November, 1997.

I. Galton, “Combined Angle Demodulator and Digitizer.” U.S. Patent No. 5,369,404, November, 1994.

S.H. Maslak, H.G. Larsen, J.S. Chaffin, P.E. Chandler, I. Galton, and M. Karmali, “Variable Origin-Variable Acoustic Scanning Method and Apparatus,” U.S. Patent No. 5,261,408, November 16, 1993.

S.H. Maslak, H.G. Larsen, J.S. Chaffin, P.E. Chandler, I. Galton, and M. Karmali, “Variable Origin-Variable Angle Acoustic Scanning Method and Apparatus for a Curved Linear Array,” U.S. Patent No. 5,235,986, August 17, 1993.

I. Galton, “Analog-to-Digital Converter Using Parallel Delta-Sigma Modulator,” U.S. Patent No. 5,196,852, March 23, 1993.

S.H. Maslak, H.G. Larsen, J.S. Chaffin, P.E. Chandler, I. Galton, and M. Karmali, “Variable Origin-Variable Angle Acoustic Scanning Method and Apparatus,” U.S. Patent No. 5,148,810, September 22, 1992.