Subin Kim received the B.S. degree in electrical engineering from Hanyang University, Seoul, South Korea, in 2017, and the M.S. degree from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 2019. From 2017 to 2020, he participated in RF circuit design for wireless transceivers. He is currently working toward the Ph.D. degree at the University of California, San Diego. His current research interests include analog and mixed-signal integrated circuits, frequency synthesizers, and data converters.

Zexing Chen received his dual Bachelor of Engineering degree in Microelectronics Engineering from the University of Electronic Science and Technology of China in Chengdu, China, and the University of Glasgow in Glasgow, United Kingdom, in 2023. Currently, he is pursuing his M.S. and Ph.D. degrees at the University of California, San Diego, where he is also exploring research interests in the field of analog and mixed-signal integrated circuits, with a particular focus on phase-locked loops.

Yuvanand Saravanan completed his bachelor's degree in Computer Engineering at the University of California, San Diego, in 2025. He previously interned as an Embedded Software Engineer at Extreme Waves in 2024, where he worked on microcontroller-based control and testing of RF devices, and as a Firmware Engineer at Astera Labs in 2025, where he developed and simulated hardware models to support early firmware development for ASICs. He is currently pursuing his master's degree in Computer Engineering at UC San Diego, with interests in VLSI, RTL design, and physical chip design.

Nandhini Ravichandran earned the Dual Degree in electrical engineering from the Indian Institute of Technology Madras, India, in 2023. From 2023 to 2025, she worked as an analog design engineer with Texas Instruments, designing LDO regulators and PMICs for automotive applications. Currently, she is pursuing her M.S. degree at the University of California, San Diego, where she is exploring her interest in analog and mixed-signal integrated circuits, with a focus on phase-locked loops and data converters.

Harikailash Sundar earned his Bachelor of Engineering in Electronics and Communication from the College of Engineering Guindy, Anna University, India, in 2022. At CEG, he was part of the Integrated Systems Laboratory group, where he worked on an FLL-based temperature sensor and on Filtering by Aliasing. From 2022 to 2024, he worked in RF and analog IC design for wireless transceivers at Silicon Labs, India. He graduated with an M.S. degree in Electronic Circuits and Systems from the University of California, San Diego. He is currently with Marvell Technology, where he works on AMS design of high-speed optical SerDes. He is also exploring research interests in mixed-signal IC design, particularly DAC calibration and phase-locked loops.

Aditya Sundararajan received the Dual Degree (B.Tech. and M.Tech.) in Electrical Engineering from the Indian Institute of Technology Madras, India, in 2022, and the M.S. degree in Electrical and Computer Engineering from the University of California, San Diego, in 2024. He is currently with Analog Devices, Wilmington, MA, where he works on the design and development of high-speed digital-to-analog converters (DACs). His research and professional interests include mixed-signal integrated circuits, signal processing, and calibration techniques.

Raghu Haresamudram obtained his B.E. in Electrical Engineering from BITS-Pilani, India in 2007 and M.S. in Electrical Engineering from UC San Diego in 2016. Raghu is presently with Broadcom designing high-speed serial interfaces, while working to finish his Ph.D. at UCSD. Prior to UCSD, he was with MaxLinear from 2013 to 2014 developing their first RF front-end IC for satellite TVs, and with Cosmic Circuits (now Cadence Inc.) from 2007 to 2013, designing power management ICs for portable applications. Raghu’s research interests broadly lie in circuits and signal processing techniques for wireless and wireline communications. The focus of his Ph.D. is on calibration techniques to digitally enhance cellular receivers for blocker tolerance.